1. Field of the Invention
The present invention relates generally to a fabrication process of a semiconductor device employing citric acid type etching agent. More specifically, the invention relates to a fabrication process of a semiconductor device, in which side etching is restricted.
2. Description of the Prior Art
Conventionally, citric acid type etching agent as a mixture of citric acid aqueous solution and hydrogen peroxide solution, is used in selective wet etching of GaAs/AlGaAs. The citric acid type etching agent has high etching selection ratio of GaAs versus Al.sub.x Ga.sub.1-x As (0.ltoreq.x.ltoreq.1) and thus permits fabrication of a device superior in uniformity of a threshold voltage. For example, an excellent result wherein an etching selection ratio of GaAs versus AlAs is 1450, the standard deviation .sigma.Vt of the threshold voltage is 13.5 mV , was able to be obtained (M. Tong et al., "A Comparative Study of Wet and Dry Selective Etching Process for GaAs/AlGaAs/InGaAs Pseudomorphic MODFETS", Journal of Electronic Materials, 9-14, Vol. 21, No. 1 (1992)). On the other hand, there have been reported other etching processes of a semiconductor device employing citric acid type etching agent (Mitsuyuki Otsubo et al., "Preferential Etching of GaAs Through Photoresist Masks", J. Electrochem. Soc., SOLID-STATE SCIENCE AND TECHNOLOGY, 676-680, Vol. 123, No. 5 (1976), and M. Schneider et al., "Characteristics of nonselective GaAs /(Al, Ga)As heterostructure etching at very low etch rate", SPIE Vol. 797, Advanced Processing of Semiconductor Devices, 149-155 (1987)). Also, by performing selective etching employing a mixture liquid of citric acid aqueous solution and hydrogen peroxide solution, uniformity of a drain current and the minimum noise factor was able to be obtained (Hisaaki Tominaga et al., "Application of Selective Wet Etching for MODFET", 5-152, The Institute of Electronics, Information and Communication Engineers, Spring Meeting (1993)).
One example of the conventional fabrication process of a semiconductor device employing the citric acid type etching agent will be discussed. FIGS. 1A and 1B are sections showing a semiconductor device which was fabricated through a conventional fabrication process. FIG. 1A illustrates a section as the (011) plane of the substrate, and FIG. 1B illustrates a section as the (011) plane of the substrate. First, on the surface of the semi-insulating-GaAs substrate 31 having plane orientation of the [100] direction, an intrinsic-GaAs layer 32 as a buffer layer, an i-InGaAs layer 33 as a channel layer, an n-AlGaAs layer 34 as a supply layer, an AlAs layer 35 as a stopper layer and an n-GaAs layer 36 as a contact layer are sequentially stacked in order. Next, ohmic metal 37 is deposited and heat treatment is performed to form ohmic contacts.
Next, photoresist 38 is deposited. Then, the n-GaAs layer 36 is etched at 20.degree. C. employing the citric acid type etching agent with taking the photoresist 38 as a mask. Thereafter, etching is stopped with water at a temperature of 20.degree. C., and the wafer is washed. Subsequently, a gate metal layer is deposited on the n-AlGaAs layer 34. Then, by a lift-off method or the like, the mask and extra metal are removed to fabricate a semiconductor device.
However, in the device fabricated employing the foregoing method, as shown in FIG. 1, on the (011) plane and the (011) plane, etching in a transverse direction at the mask, so-called side etching is progressed. It should be noted that, in the (111) plane, a plane exposing Ga will be hereinafter referred to as the (111)A plane and a plane exposing As will be hereinafter referred to as the (111)B plane. An etching rate in the side etching depends upon the etching rate on the (111)A plane. When the side etching is caused, adverse effects in that source resistance is increased, surface level is affected with the n-AlGaAs layer 34 exposed and so forth, can be caused.
In order to solve such a problem, there is a method to restrict the side etching by adjusting an etching period. This method requires strict time control is difficulty to control, and thus is not desirable in view point of reproducibility and uniformity.
In a method employing a dry etching method in order to avoid the side etching, problems are encountered as requiring a large scale device and as being possible to cause damage to the semiconductor device for performing physical polishing.
On the other hand, in the conventional fabrication process, water at the room temperature is employed for stopping etching. Etching of a wafer is slightly progressed until the etching agent is sufficiently diluted to cause overetching or variation of etching.
Furthermore, when temperature variation due to reaction heat in the water as stopping liquid, or the like, variation of etching due to the overetching upon stopping of etching can be increased.